JEE Main · 2026 · 21 Jan 2026 · Shift 1 · Semiconductors

Each of the first two gates receives a single input through an OR shape carrying an inverting bubble, so it behaves as an inverter: the upper one gives $\bar{A}$ and the lower one gives $\bar{B}$. These feed the third bubbled OR gate, whose output is $\overline{\bar{A}+\bar{B}}=A\cdot B$. The final gate again has a single input and an inverting bubble, so it inverts this product to give $\overline{AB}$. A circuit whose output is $\overline{AB}$ is a NAND gate.