JEE Main · 2021 · 16 Mar 2021 · Shift 2 · Semiconductors

The following logic gate is equivalent to:

Answer: (C)

Solution

Each of the first two gates is a NAND with its two inputs tied together, so they deliver

\overline{A}

and

\overline{B}

. These feed a third NAND, whose output is

\overline{\overline{A} \cdot \overline{B}} = A + B

by De Morgan's theorem. The last gate also has both its inputs tied together, so it inverts this once more and

Y = \overline{A + B}

The combination behaves as a NOR gate.

JEE Main · 2021 · 16 Mar 2021 · Shift 2 · Single correct option