JEE Main · 2021 · 17 Mar 2021 · Shift 2 · Semiconductors

The upper gate forms $A\cdot B$ and the inverter that follows it gives $\overline{A\cdot B}$, while the lower gate forms $A+B$. The output gate takes the AND of these two signals:

This is $1$ when the two inputs differ and $0$ when they agree, which is the behaviour of an XOR gate.