JEE Main · 2019 · 10 Jan 2019 · Shift 1 · Semiconductors

Tracing the gate network, the upper path forms $P=\overline{X}+Y$ and the lower path forms $Q=\overline{X\overline{Y}}$, and these feed a final NOR, so $R=\overline{P+Q}$. By De Morgan, $R=\overline{P}\cdot \overline{Q}=(X\overline{Y})\cdot (X\overline{Y})=X\overline{Y}$. A high output therefore needs $X=1$ together with $\overline{Y}=1$, that is $Y=0$. Only the input pair with $X$ high and $Y$ low drives $R$ to $1$.